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general description the MAX1667 provides the power control necessary to charge batteries of any chemistry. all charging functions are controlled through the intel system management bus (smbus) interface. the smbus 2-wire serial interface sets the charge voltage and current and provides thermal status information. the MAX1667 functions as a level 2 charger, compliant with the duracell/intel smart battery charger specification. in addition to the feature set required for a level 2 charg- er, the MAX1667 generates interrupts to signal the host when power is applied to the charger or when a battery is installed or removed. additional status bits allow the host to check whether the charger has enough input voltage, and whether the voltage on or current into the battery is being regulated. this allows the host to determine when lithium-ion (li+) batteries have completed the charge with- out interrogating the battery. the MAX1667 is available in a 20-pin ssop with a 2mm profile height. ________________________applications notebook computers charger base stations personal digital assistants phones ____________________________features charges any battery chemistry: li+, nicd, nimh, lead acid, etc. smbus 2-wire serial interface compliant with duracell/intel smart battery charger specification rev. 1.0 4a, 3a, or 1a (max) battery charge current 5-bit control of charge current up to 18.4v battery voltage 11-bit control of voltage 1% voltage accuracy up to +28v input voltage battery thermistor fail-safe protection greater than 95% efficiency synchronous rectifier MAX1667 chemistry-independent, level 2 smart battery charger ________________________________________________________________ maxim integrated products 1 typical operating circuit part MAX1667eap -40? to +85? temp range pin-package 20 ssop ordering information smbus is a trademark of intel corp. 19-1488; rev 1; 5/03 MAX1667 dcin ref bst dhi lx dlo pgnd int cs batt scl sda thm iout vl charge source agnd sel dacv ccv cci v dd host controller smart battery scl sda int gnd batt+ r sense scl sda temp batt- pin configuration appears at end of data sheet. for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
MAX1667 chemistry-independent, level 2 smart battery charger 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v dcin = 18v, internal reference, 1? capacitor at ref, 1? capacitor at vl, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?, unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. dcin to agnd .......................................................-0.3v to +30v bst to agnd..........................................................-0.3v to +36v bst, dhi to lx..........................................................-0.3v to +6v lx, iout to agnd..................................................-0.3v to +30v thm, cci, ccv, dacv, ref, dlo to agnd .............................................-0.3v to (vl + 0.3v) vl, sel, int , sda, scl to agnd ............................-0.3v to +6v batt, cs+ to agnd ..............................................-0.3v to +20v pgnd to agnd .....................................................-0.3v to +0.3v sda, int current ................................................................50ma vl current ...........................................................................50ma continuous power dissipation (t a = +70?) ssop (derate 8mw/? above +70?) ..........................640mw operating temperature range ...........................-40? to +85? storage temperature range .............................-60? to +150? lead temperature (soldering, 10s) .................................+300? % -0.8 0.8 chargingvoltage() = 0x3130 (12,592mv) and 0x41a0 (16,800mv) voltage accuracy mv 5 chargingcurrent() = 0x0080 (128ma) cs to batt single-count current-sense voltage v 019 batt, cs input voltage range ? 350 500 vl > 5.15v, v batt = 12v batt input current (note 1) 15 vl < 3.2v, v batt = 12v ? 58 high or low dlo on-resistance ? 47 high or low dhi on-resistance ma 46 7.5v < v dcin < 28v, logic inputs = vl dcin quiescent current v 7.5 28 dcin input voltage range % 96.5 97.7 in dropout dhi maximum duty cycle khz 200 250 300 not in dropout oscillator frequency v 5.15 5.4 5.65 7.5v < v dcin < 28v, no load vl output voltage mv 100 i load = 0 to 10ma vl load regulation v 3.20 4 5.15 vl ac_present trip point 4.055 4.096 4.137 units min typ max conditions parameter ? 170 400 vl > 5.15v, v cs = 12v cs input current (note 1) 15 vl < 3.2v, v cs = 12v mv 145 160 175 sel = vl (4a), chargingcurrent() = 0x0f80 (3968ma) cs to batt full-scale current-sense voltage v 0 < i source < 500? ref output voltage t a = +25 c t a = t min to t max -1.0 1.0 t a = +25 c t a = t min to t max -3.0 3.0 -1.0 1.0 chargingvoltage() = 0x1060 (4192mv) and 0x20d0 (8400mv) switching regulator supply and reference
MAX1667 chemistry-independent, level 2 smart battery charger _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dcin = 18v, internal reference, 1? capacitor at ref, 1? capacitor at vl, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?, unless otherwise noted.) note 1: when dcin is less than 4v, vl is less than 3.2v, causing the battery current to be typically 2? (cs plus batt input current). bits 11 guaranteed monotonic vdac voltage-setting dac resolution bits 5 guaranteed monotonic cdac current-setting dac resolution ma 5 ma 579 % of v ref 3 4.5 6 thm falling thm thermistor_ur underrange trip point % of v ref 22 23.5 25 thm falling thm thermistor_hot trip point % of v ref 74 75.5 77 thm falling thm thermistor_cold trip point ma/v 0.2 gmi amplifier transconductance ma/v 1.4 gmv amplifier transconductance % of v ref 89 91 93 thm falling thm thermistor_or overrange trip point % of v dcin 93 95 97 batt rising batt power_fail threshold ? ?0 gmv amplifier maximum output current ? ?00 gmi amplifier maximum output current mv 25 80 200 1.1v < v cci < 3.5v ccv clamp voltage with respect to cci units min typ max conditions parameter ma 6 v sda = 0.6v sda output low sink current ? -1 1 sda, scl input bias current v 2.2 sda, scl input voltage high v 0.8 sda, scl input voltage low mv 25 80 200 1.1v < v ccv < 3.5v cci clamp voltage with respect to ccv chargingcurrent() = 0x0000 10 ? chargingcurrent() = 0x0001 to 0x007f (127ma) v iout = 17v, chargingcurrent() = 0x0001 to 0x007f (127ma) v dcin = 0, v iout = 20v ? 10 iout leakage current v iout = 0 iout output current % of v dcin 0.5 thm thermistor_or, _cold, _hot, _ur trip point hysteresis % of v dcin 1 batt power_fail threshold hysteresis error amplifiers trip points and linear current sources current- and voltage-setting dacs logic levels
MAX1667 chemistry-independent, level 2 smart battery charger 4 _______________________________________________________________________________________ electrical characteristics (v dcin = 18v, internal reference, 1? capacitor at ref, 1? capacitor at vl, t a = -40? to +85? , unless otherwise noted. typical values are at t a = +25?. limits over this temperature range are guaranteed by design.) ? cs input current (note 1) 5 vl < 3.2v, v cs = 12v mv 145 160 175 v sel = vl, chargingcurrent() = 0x0f80 (128ma) cs to batt full-scale current-sense voltage % -1.0 1.0 chargingvoltage() = 0x3130 (12,592mv), chargingvoltage() = 0x41a0 (16,800mv) voltage accuracy ? batt input current (note 1) 5 vl < 3.2v, v batt = 12v ? 58 high or low dlo on-resistance ? 47 high or low dhi on-resistance ma 46 7.5v < v dcin < 28v, logic inputs = vl dcin quiescent current % 96.5 in dropout dhi maximum duty cycle khz 200 250 310 not in dropout oscillator frequency v 5.15 5.4 5.65 7.5v < v dcin < 28v, no load vl output voltage v 4.055 4.137 0 < i source < 500? ref output voltage units min typ max conditions parameter % of v ref 88.5 93.5 thm falling thm thermistor_or overrange trip point % of v ref 73.5 77.5 thm falling thm thermistor_cold trip point v 0.5 sda, scl input voltage low v 2.2 sda, scl input voltage high ? -1 1 sda, scl input bias current % of v ref 21.5 25.5 thm falling thm thermistor_hot trip point % of v ref 2.5 6.5 thm falling thm thermistor_ur underrange trip point ma 6 v sda = 0.6v sda output low sink current % 1 thm thermistor_or, _cold, _hot, _ur trip point hysteresis -3.0 3.0 chargingvoltage() = 0x1060 (4192mv), chargingvoltage() = 0x20d0 (8400mv) supply and reference switching regulator trip points and linear current sources logic levels
MAX1667 chemistry-independent, level 2 smart battery charger _______________________________________________________________________________________ 5 timing characteristics (figures 1 and 2) ( t a = 0? to +85? , unless otherwise noted.) timing characteristics (figures 1 and 2) ( t a = -40? to +85? , unless otherwise noted. limits over this temperature range are guaranteed by design.) conditions ? 1 t dv scl falling edge to sda valid, master clocking in data ns 0 t hd:dat scl falling edge to sda transition ? 4.7 t su:sta start-condition setup time ? 4.7 t low ? 4 t high scl serial-clock high period scl serial-clock low period ? 4 t hd:sta start-condition hold time ns 250 t su:dat sda valid to scl rising-edge setup time, slave clocking in data units min typ max symbol parameter conditions ? 4.7 t su:sta start-condition setup time ? 4.7 t low units min typ max symbol parameter scl serial-clock low period ? 4 t hd:sta start-condition hold time ? 4 t high scl serial-clock high period ns 250 t su:dat sda valid to scl rising-edge setup time, slave clocking in data ns 0 t hd:dat scl falling edge to sda transition ? 1 t dv scl falling edge to sda valid, master clocking in data
MAX1667 chemistry-independent, level 2 smart battery charger 6 _______________________________________________________________________________________ figure 2. smbus serial-interface timing?cknowledge t dv slave pulling sda low t dv most significant bit of data clocked into master acknowledge bit clocked into master rw bit clocked into slave scl sda start condition most significant address bit (a6) clocked into slave a5 clocked into slave a4 clocked into slave a3 clocked into slave t high t low t hd:sta t su:sta t su:dat t hd:dat scl sda t su:dat t hd:dat figure 1. smbus serial-interface timing?ddress
MAX1667 chemistry-independent, level 2 smart battery charger _______________________________________________________________________________________ 7 5.20 5.30 5.25 5.40 5.35 5.45 5.50 010 5 152025 vl load regulation MAX1667 toc04 load current (ma) vl (v) v dcin = 20v 5.35 5.38 5.37 5.36 5.40 5.39 5.44 5.43 5.42 5.41 5.45 -40 -20 0 20 40 60 80 100 vl vs. temperature MAX1667 toc05 temperature (?) vl (v) v dcin = 20v 4.06 4.10 4.07 4.08 4.09 4.11 00.8 0.6 0.2 0.4 1.0 1.2 1.4 1.6 1.8 2.0 v ref load regulation MAX1667 toc06 load current (ma) v ref (v) 5.350 5.375 5.400 5.425 5.450 vl line regulation MAX1667 toc03 v dcin (v) vl (v) 01015 5 202530 no load 5v/div 10v load transient (with change in regulation loop) MAX1667toc02 v dcin = 18v chargingvoltage() = 12,000mv chargingcurrent() = 1500ma 1ms/div v batt cci cci cci 50mv/div 2v 1a 500ma/div ccv ccv ccv i load averaged measurement 5v/div 10v load transient (voltage regulation with current limit) MAX1667toc01 v dcin = 18v chargingvoltage() = 12,000mv chargingcurrent() = 1500ma 500 s/div v batt cci ccv cci cci cci 200mv/div 1.4v 1a 1a/div ccv ccv ccv i load averaged measurement __________________________________________typical operating characteristics (circuit of figure 7, t a = +25?, unless otherwise noted.)
MAX1667 chemistry-independent, level 2 smart battery charger 8 _______________________________________________________________________________________ -1.0 -0.6 -0.8 -0.2 -0.4 0.2 0 0.4 0.8 0.6 1.0 04k6k8k 2k 10k 12k 14k 18k 16k 20k batt voltage error vs. chargingvoltage() code MAX1667 toc12 chargingvoltage() code batt voltage error (%) i load = 3ma v dcin = 20v measured at available chargingvoltage() codes i load = 600ma -5 0 5 10 15 0 1000 2000 3000 500 1500 2500 3500 4000 load current error MAX1667 toc13 code batt current error (%) v dcin =20v v batt = 12.75v measured at available chargingcurrent() codes typical operating characteristics (continued) (circuit of figure 7, t a = +25?, unless otherwise noted.) 100 0.01 10 1.0 0.1 0.001 0 400 800 1200 1600 2000 output v-i characteristic (switching regulator) MAX1667 toc10 load current (ma) drop in batt output voltage (%) v dcin = 20v chargingvoltage() = 17,408mv chargingcurrent() = 1920ma v ref = 4.096v 0 5 1 3 4 8 02468101214161820 output v-i characteristic (linear source) MAX1667 toc11 v iout (v) i iout (ma) 2 6 7 v dcin = 20v chargingvoltage() = 17,408mv chargingcurrent() = 1 to 127ma 4.080 4.100 4.085 4.090 4.095 4.110 -40 40 20 -20 0 60 80 100 v ref vs. temperature MAX1667 toc07 temperature ( c) v ref (v) 4.105 v dcin = 20v 50 70 55 60 65 100 02000 1000 3000 4000 efficiency vs. load current (voltage regulation) MAX1667 toc08 load current (ma) efficiency (%) 75 80 85 90 95 a: v dcin = 20v, v batt = 17v b: v dcin = 16v, v batt = 12.75v c: v dcin = 20v, v batt = 12.75v d: v dcin = 16v, v batt = 8.5v e: v dcin = 20v, v batt = 8.5v a b c e d 50 70 55 60 65 100 08 6 2 4 10 12 18 efficiency vs. batt voltage (current regulation) MAX1667 toc09 batt voltage (v) efficiency (%) 75 80 85 90 95 14 16 a: v dcin = 16v, i load = 2a b: v dcin = 20v, i load = 2a c: v dcin = 20v, i load = 600ma a b c
MAX1667 chemistry-independent, level 2 smart battery charger _______________________________________________________________________________________ 9 pin description linear current-source output 1 iout input voltage for powering charger 2 dcin voltage-regulation-loop compensation point 4 ccv ic power supply. 5.4v linear-regulator output from dcin. 3 vl current-range selector. connecting sel to vl sets a 4a full-scale current. leaving sel open sets a 3a full-scale current. connecting sel to agnd sets a 1a full-scale current. 6 sel battery voltage input and current-sense negative input 8 batt current-sense positive input 7 cs current-regulation-loop compensation point 5 cci +4.096v reference voltage output or external reference input 9 ref open-drain interrupt output 11 int analog ground 10 agnd thermistor sense voltage input 12 thm serial data (need external pull-up resistor) 14 sda power ground 16 pgnd voltage dac output filtering point 15 dacv serial clock (need external pull-up resistor) 13 scl high-side power mosfet driver output 18 dhi power connection for the high-side power mosfet driver 20 bst power connection for the high-side power mosfet driver 19 lx low-side power mosfet driver output 17 dlo function pin name
MAX1667 chemistry-independent, level 2 smart battery charger smart battery charging system a smart battery charging system, at a minimum, con- sists of a smart battery and smart battery charger com- patible with the smart battery system specifications using intel? system management bus (smbus). smart battery system block diagrams a system may use one or more smart batteries. the block diagram of a smart battery charging system shown in figure 3 depicts a single battery system. this is typically found in notebook computers, video cam- eras, cellular phones, and other portable electronic equipment. another possibility is a system that uses two or more smart batteries. a block diagram for a system featuring multiple batteries is shown in figure 4. the smart bat- tery selector is used to connect batteries to either the smart battery charger or the system, or to disconnect them, as appropriate. for a standard smart battery, the following connections must be made: power (the bat- tery? positive and negative terminals), smbus (clock and data), and safety signal (resistance, typically tem- perature dependent). additionally, the system host must be able to query any battery in the system so it can display the state of all batteries present in the sys- tem. figure 4 shows a two-battery system where battery 2 is being charged while battery 1 is powering the system. this configuration may be used to ?ondition?battery 1, allowing it to be fully discharged prior to recharge. smart battery charger types two types of smart battery chargers are defined: level 2 and level 3. all smart battery chargers communicate with the smart battery using the smbus; the two types differ in their smbus communication mode and in whether they modify the charging algorithm of the smart battery as shown in table 1. level 3 smart bat- tery chargers are supersets of level 2 chargers and as such support all level 2 charger commands. system power control ac-dc converter (unregulated) ac system power supply dc (unregulated) / v battery safety signal v battery dc (unregulated) v cc +12v, -12v system host (smbus host) smart battery critical events critical events charging voltage/current requests battery data/status requests smart battery charger smbus MAX1667 figure 3. typical single smart battery system 10 ______________________________________________________________________________________
MAX1667 chemistry-independent, level 2 smart battery charger ______________________________________________________________________________________ 11 level 2 smart battery charger the level 2 or ?mart-battery-controlled?smart battery charger interprets the smart battery? critical warning messages, and operates as an smbus slave device that responds to chargingvoltage() and charging- current() messages sent to it by a smart battery. the charger is obliged to adjust its output characteristics in direct response to the messages it receives from the battery. in level 2 charging, the smart battery is com- pletely responsible for initiating communication and for providing the charging algorithm to the charger. the smart battery is in the best position to tell the smart bat- tery charger how it needs to be charged. the charging algorithm in the battery may request a static charge condition or may choose to periodically adjust the smart battery charger? output to meet its present needs. a level 2 smart battery charger is truly chem- istry independent, and since it is defined as an smbus slave device only, it is relatively inexpensive and easy to implement. table 1. charger type by smbus mode and charge algorithm source level 3 level 3 slave/master level 3 level 2 modified from battery battery slave only smbus mode charge algorithm source note: level 1 smart battery chargers are defined in the ver- sion 0.95a specification. while they can correctly interpret smart battery end-of-charge messages minimizing over- charge, they do not provide truly chemistry-independent charging. they are no longer defined by the smart battery charger specification and are explicitly not compliant with this and subsequent smart battery charger specifications. ac-dc converter (unregulated) ac dc (unregulated) / v battery note: sb 1 powering system sb 2 charging v cc +12v, -12v system host (smbus host) smart battery selector smbus smbus smbus safety signal v charge v batt safety signal v batt safety signal smart battery 1 smart battery 2 critical events battery data/status requests smart battery charger smbus MAX1667 system power supply figure 4. typical multiple smart battery system
MAX1667 chemistry-independent, level 2 smart battery charger 12 ______________________________________________________________________________________ _______________detailed description output characteristics the MAX1667 contains both a voltage-regulation loop and a current-regulation loop. both loops operate inde- pendently of each other. the voltage-regulation loop monitors batt to ensure that its voltage never exceeds the voltage set point (v0). the current-regulation loop monitors current delivered to batt to ensure that it never exceeds the current-limit set point (i0). the cur- rent-regulation loop is in control as long as batt volt- age is below v0. when batt voltage reaches v0, the current loop no longer regulates, and the voltage-regu- lation loop takes over. figure 5 shows the v-i character- istic at the batt pin. setting v0 and i0 set the MAX1667? voltage and current-limit set points via the intel smbus 2-wire serial interface. the MAX1667? logic interprets the serial-data stream from the smbus interface to set internal digital-to-analog con- verters (dacs) appropriately. the power-on-reset value for v0 and i0 is 18.4v and 7ma, respectively. see digital section for more information. _____________________analog section the MAX1667 analog section consists of a current- mode pulse-width-modulated (pwm) controller and two transconductance error amplifiers?ne for regulating current and the other for regulating voltage. the device uses dacs to set the current and voltage level, which are controlled via the smbus interface. since separate amplifiers are used for voltage and current control, both control loops can be compensated separately for opti- mum stability and response in each state. whether the MAX1667 is controlling the voltage or cur- rent at any time depends on the battery? state. if the battery has been discharged, the MAX1667? output reaches the current-regulation limit before the voltage limit, causing the system to regulate current. as the bat- tery charges, the voltage rises until the voltage limit is reached, and the charger switches to regulating voltage. the transition from current to voltage regulation is done by the charger and need not be controlled by the host. figure 6 shows the MAX1667 block diagram. voltage control the internal gmv amplifier controls the MAX1667? out- put voltage. the voltage at the amplifier? noninverting input is set by an 11-bit dac, which is controlled by a chargingvoltage() command on the smbus (see digital section for more information). the battery voltage is fed to the gmv amplifier through a 5:1 resistive voltage divider. the set voltage ranges between 0 and 18.416v with 16mv resolution. this allows up to four li+ cells in series to be charged. the gmv amplifier? output is connected to the ccv pin, which compensates the voltage-regulation loop. typically, a series-resistor/capacitor combination can be used to form a pole-zero doublet. the pole intro- duced rolls off the gain starting at low frequencies. the zero of the doublet provides sufficient ac gain at mid- frequencies. the output capacitor then rolls off the mid- frequency gain to below 1 to guarantee stability before encountering the zero introduced by the output capaci- tor? equivalent series resistance (esr). the gmv amplifier? output is internally clamped to between one- fourth and three-fourths of the voltage at ref. current control an internal 7ma linear current source is used in con- junction with the pwm regulator to set the battery charge current. when the current is set to 0, the voltage regulator is on but no current is available. a current set- ting between 1ma and 127ma turns on the linear cur- rent source, providing a maximum of 7ma for trickle charging. for current settings above 127ma, the linear current source is disabled and the charging current is provided by the switching regulator set by the 5-bit cur- rent-control dac. the gmi amplifier? noninverting input is driven by a 4:1 resistive voltage divider, which is driven by the 5-bit dac. with the internal 4.096v reference, this input is approximately 1.0v at full scale, and the resolution is 31mv. the current-sense amplifier drives the inverting input to the gmi amplifier. it measures the voltage batt voltage average current through the resistor between cs and batt v0 v0 = voltage set point i0 = current-limit set point i0 figure 5. output v-i characteristic
MAX1667 chemistry-independent, level 2 smart battery charger ______________________________________________________________________________________ 13 figure 6. functional diagram 10k 10k 10k 10k 7ma dcin iout ref ref thm agnd cs batt from logic block thermistor_or logic block thermal shutdown thermistor_cold thermistor_hot therm_shut ac_present ccv ccv_low r 3r ref dhi note: ref/4 to 3/4 ref note: approx. ref/4 + v thresh to 3/4 ref + v thresh 3/8 ref = zero current lx pgnd from logic block agnd ccv cci gmi gmv vl bst dlo agnd vl agnd min r 4r batt r 3r to logic block from logic block from logic block voltage_inreg current_inreg to logic block to logic block power_fail 5-bit dac ref agnd agnd agnd ref dacv dcin/4.5 sel scl sda int thermistor_ur 100k 30k 3k 500 ? 5.4v linear regulator current-sense level shift and gain of 5.5 clamp 11-bit dac level shift driver summing comparator block clamp to ref (max) internal 4.096v reference dcin driver 5 11 MAX1667
MAX1667 chemistry-independent, level 2 smart battery charger 14 ______________________________________________________________________________________ across the current-sense resistor (r sen ) (which is between the cs and batt pins), amplifies it by approx- imately 5.45, and level shifts it to ground. the full-scale current is approximately 0.16v/r sen , and the resolution is 5mv/r sen . the current-regulation loop is compensated by adding a capacitor to the cci pin. this capacitor sets the current- feedback loop? dominant pole. the gmi amplifier? out- put is clamped to between approximately one-fourth and three-fourths of the ref voltage. while the current is in regulation, the ccv voltage is clamped to within 80mv of the cci voltage. this prevents the battery volt- age from overshooting when the dac voltage setting is updated. the converse is true when the voltage is in regulation and the current is not at the current dac set- ting. since the linear range of cci or ccv is about 1.5v to 3.5v (about 2v), the 80mv clamp results in a relatively negligible overshoot when the loop switches from volt- age to current regulation or vice versa. pwm controller the battery voltage or current is controlled by the cur- rent-mode, pwm, dc-dc converter controller. this con- troller drives two external n-channel mosfets, which switch the voltage from the input source. this switched voltage feeds an inductor, which filters the switched rec- tangular wave. the controller sets the pulse width of the switched voltage so that it supplies the desired voltage or current to the battery. the heart of the pwm controller is the multi-input com- parator. this comparator sums three input signals to determine the pulse width of the switched signal, set- ting the battery voltage or current. the three signals are the current-sense amplifier? output, the gmv or gmi error amplifier? output, and a slope-compensation sig- nal, which ensures that the controller? internal current- control loop is stable. the pwm comparator compares the current-sense amplifier? output to the lower output voltage of either the gmv or the gmi amplifier (the error voltage). this current-mode feedback corrects the duty ratio of the switched voltage, regulating the peak battery current and keeping it proportional to the error voltage. since the average battery current is nearly the same as the peak current, the controller acts as a transconductance amplifier, reducing the effect of the inductor on the out- put filter lc formed by the output inductor and the bat- tery? parasitic capacitance. this makes stabilizing the circuit easy, since the output filter changes from a com- plex second-order rlc to a first-order rc. to preserve the inner current-control loop? stability, slope compen- sation is also fed into the comparator. this damps out perturbations in the pulse width at duty ratios greater than 50%. at heavy loads, the pwm controller switches at a fixed frequency and modulates the duty cycle to control the battery voltage or current. at light loads, the dc current through the inductor is not sufficient to prevent the cur- rent from going negative through the synchronous recti- fier (figure 7, m2). the controller monitors the current through the sense resistor r sen ; when it drops to zero, the synchronous rectifier turns off to prevent negative current flow. mosfet drivers the MAX1667 drives external n-channel mosfets to regulate battery voltage or current. since the high-side n-channel mosfet? gate must be driven to a voltage higher than the input source voltage, a charge pump is used to generate such a voltage. the capacitor c7 (figure 7) charges to approximately 5v through d2 when the synchronous rectifier turns on. since one side of c7 is connected to the lx pin (the source of m1), the high-side driver (dhi) can drive the gate up to the volt- age at bst (which is greater than the input voltage) when the high-side mosfet turns on. the synchronous rectifier may not be completely replaced by a diode because the bst capacitor charges while the synchronous rectifier is turned on. without the synchronous rectifier, the bst capacitor may not fully charge, leaving the high-side mosfet with insufficient gate drive to turn on. use a small mos- fet, such as a 2n7002, to guarantee that the bst capacitor is allowed to charge. in this case, most of the current at high currents is carried by the schottky diode and not by the synchronous rectifier. internal regulator and reference the MAX1667 uses an internal low-dropout linear regula- tor to create a 5.4v power supply (vl), which powers its internal circuitry. vl can supply up to 20ma, less than 10ma powers the internal circuitry, and the remaining current can power the external circuitry. the current used to drive the mosfets comes from this supply, which must be considered when calculating how much power can be drawn. to estimate the current required to drive the mosfets, multiply the total gate charge of each mosfet by the switching frequency (typically 250khz). to ensure vl stability, bypass the vl pin with a 1? or greater capacitor. the MAX1667 has an internal, accurate 4.096v refer- ence voltage. this guarantees a voltage-setting accu- racy of ?% max. bypass the reference with a 1? or greater capacitor.
MAX1667 chemistry-independent, level 2 smart battery charger ______________________________________________________________________________________ 15 figure 7. typical application circuit agnd d2 c9 r5 r6 c6 m1 m2 d1 d4* d3 dc source c1 l1 d5 r1 c7 c11 ref r3 c4 c10 thm cci iout c5 (note 2) 10 1 2 6 3 20 18 19 17 16 7 8 13 14 11 9 12 5 4 15 = high-current traces (8a max) note 1: c6, m2, d1, and c1 grounds must connect to the same rectangular pad on the layout. note 2: c5 and c11 must be placed within 0.5cm of the MAX1667, with traces no longer than 1cm connecting vl and pgnd. *optional (see negative input voltage protection section). see tables 2a and 2b for component selection and manufacturers. c8 c2 r2 c3 r4 dcin MAX1667 sel vl bst ccv dacv lx dlo pgnd cs dhi (note 1) smart battery standard connector -td c+ batt scl sda int host & load smbclock v+ smbdata kint- gnd 7.5v 28v
MAX1667 chemistry-independent, level 2 smart battery charger 16 ______________________________________________________________________________________ table 2a. component selection _____________________digital section smbus interface the MAX1667 uses serial data to control its operation. the serial interface complies with the smbus specification (see system management bus specification , from the sbs forum at www.sbs-forum.org or from intel architecture labs: 800-253-3696). charger functionality complies with the duracell/intel smart charger specification for a level 2 charger. the MAX1667 uses the smbus read-word and write- word protocols to communicate with the battery it is charging, as well as with any host system that monitors the battery to charger communications. the MAX1667 acts only as a slave device and never initiates communi- cation on the bus; it receives commands and responds to queries for status information. figures 8a and 8b show the smbus write-word and read-word protocols. each communication with the MAX1667 begins with the master issuing a start condition, which is a high-to- low transition on sda while scl is high (figure 1). designation manufacturer m2 low-side mosfet c8 r1 sense resistor 40m ? ?%, 1w 2n7002 equivalent d2, d3 central sprague 594d686x0025r2t c1 output capacitor tpse686m020r0150 68?, 20v, low esr irf7805 m1 high-side mosfet ir irf7603 irf7201 r5, r6 33 ? ?%, 1/16w r3 10k ? ?%, 1/16w r2, r4 10k ? ?%, 1/16w 4a 1a 3a c4, c5, c9, c10 1? c2, c7, c11 c3 47nf 0.1? c6 input capacitor sprague 594d226x0035r2t tpse226m035r0200 2 x 22?, 35v, low esr d1, d4, d5 schottky diodes central cmsh3-40 cmsh5-40 mbrs130lt3 mbrs340t3 1n5819 equivalent 1n5821 equivalent mbrs340t3 1n5821 equivalent avx avx motorola motorola mmbf1170lt1 l1 inductor 33?, 1a i sat 33?, 3a i sat , 30v 33?, 4a i sat , 30v sumida cdh74-330 cdrh127-330 cdrh127-270 coiltronics up1b-330 up3b-330 coilcraft ds3316p-333 fds6680 fairchild fdn359a fds4410 motorola mtsf3n03hd mmdf3n03hd irc lr251201r040f dale wsl-2512/0.04w/?% 22nf schottky diode, 50ma i dc , 30v, cmpsh-3 niec ec31 nsq03a04 cmsh5-40
MAX1667 chemistry-independent, level 2 smart battery charger ______________________________________________________________________________________ 17 when the master has finished communicating with the slave, the master issues a stop condition, which is a low-to-high transition on sda while scl is high. the bus is then free for another transmission. figures 1 and 2 show timing diagrams for signals on the smbus inter- face. the address byte, control byte, and data bytes are transmitted between the start and stop condi- tions. data is transmitted in 8-bit words, and after each byte either the slave or the master issues an acknowl- edgment (figure 2); therefore, nine clock cycles are required to transfer each byte. the sda state is allowed to change only while scl is low, except for the start and stop conditions. the MAX1667 7-bit address is preset to 0b0001001. the eighth bit indicates a write-word ( w = 0) or a read-word (r = 1) command. this can also be denot- ed by the hexadecimal number 0x12 for a write-word command or a 0x13 for a read-word command. the following commands use the write-word protocol (figure 8a): chargermode(), chargingvoltage(), chargingcurrent(), and alarmwarning(). the chargerstatus command uses the read-word protocol (figure 8b). chargermode() the chargermode() command uses write-word protocol (figure 8a). the command code for chargermode() is 0x12 (0b00010010). table 3 describes the functions of the 16 data bits (d0?15). bit 0 refers to the d0 bit in the write-word protocol. whenever the battery_present status bit (bit 14) of chargerstatus() is clear, the hot_stop bit is set, regardless of any previous chargermode() command. to charge a battery that has a thermistor impedance in the hot range (i.e., thermistor_hot = 1 and thermistor_ur = 0), the host must use the chargermode() command to clear hot_stop after the battery is inserted. the hot_stop bit returns to its default power-up condition (?? whenever the battery is removed. chargingvoltage() the chargingvoltage() command uses write-word proto- col (figure 8a). the command code for chargingvoltage() is 0x15 (0b00010101). the 16-bit binary number formed by d15?0 represents the voltage set point (v0) in milli- volts; however, since the MAX1667 has only 16mv of reso- lution in setting v0, the d0, d1, d2, and d3 bits are ignored. the maximum voltage delivered by the MAX1667 is 18.416v, corresponding to a chargingvoltage() value of 0x47f0. this is also the floating voltage set by the power-on reset (por). chargingvoltage() values above 0x47f0 deliver the floating voltage and set the volt- age_or status bit. any time the battery_present status bit is clear, the chargingvoltage() register returns to its por state. figure 9 shows the mapping between v0 (the voltage- regulation-loop set point) and the chargingvoltage() data. chargingcurrent() the chargingcurrent() command uses write-word proto- col (figure 8a). the command code for chargingcurrent() is 0x14 (0b00010100). the 16-bit binary number formed by d15?0 represents the current-limit set point (i0) in milliamps (table 4). connecting sel to agnd selects a 0.896a maximum setting for i0. leaving sel open selects a 2.944a maximum setting for i0. connecting sel to vl selects a 3.968a maximum setting for i0. two sources of current in the MAX1667 charge the bat- tery: a linear current source begins from iout, and a switching regulator controls the current flowing through the current-sense resistor (r1). iout provides a trickle- charge current to compensate for battery self-discharge, while the switching regulator provides large currents for fast charging. iout sources 7ma, while the switching regulator sources from 128ma to 3968ma with a 5-bit resolution (lsb = 5.12mv / rsense = 128ma with a 40m ? sense resistor). in table 4, da4?a0 denotes the bits in the current dac code. table 5 shows the relationship between the value programmed with the charging- current() command and iout source current. the ccv_low comparator checks to see if the output volt- table 2b. component suppliers 847-639-1469 847-639-6400 coilcraft 516-435-1824 516-435-1110 803-626-3123 803-946-0690 avx central semiconductor 561-241-9339 561-241-7876 coiltronics fax phone manufacturer 512-992-3377 512-992-7900 irc 310-322-3332 310-322-3331 605-665-1627 605-668-4131 dale ir 805-867-2698 805-867-2555 niec 603-224-1430 603-224-1961 408-970-3950 408-988-8000 siliconix sprague 847-956-0702 847-956-0666 sumida 516-864-7630 516-543-7100 zetex
MAX1667 chemistry-independent, level 2 smart battery charger 18 ______________________________________________________________________________________ age is too high by comparing ccv to ref/4. if ccv_low = 1 (when ccv < ref/4), iout shuts off. this prevents the output voltage from exceeding the voltage set point specified by the chargingvoltage() register. voltage_notreg = 1 whenever the internal clamp pulls down on ccv. (the internal clamp pulls down on ccv to keep its voltage close to cci? volt- age.) with the switching regulator on, the current through r1 (figure 7) is regulated by sensing the average voltage between cs and batt. figure 10 shows the relation- ship between the chargingcurrent() data and the aver- age voltage between cs and batt. when the switching regulator is off, dhi is forced to lx and dlo is forced to ground. this prevents current from flowing through inductor l1. table 6 shows the relationship between the chargingcurrent() register value and the switching regulator current dac code (da4?a0). to ensure that the actual output current matches the data value programmed with the chargingcurrent() command, r1 should be as close as possible to 40m ? . the sel pin setting affects the full-scale current but not the step size. chargingcurrent() values above the full- scale setting set the current_or status bit. note that whenever any current dac bits are set, the linear-cur- rent source is turned off. the power-on reset value for the chargingcurrent() reg- ister is 0x0007. any time the battery_present status bit is clear (battery removed), the chargingcurrent() register returns to its power-on reset state. this ensures that upon insertion of a battery, the initial charging cur- rent is 7ma. alarmwarning() the alarmwarning() command uses write-word protocol (figure 8a). the command code for alarmwarning() is 0x16 (0b00010110). the alarmwarning() command sets the alarm_inhibited status bit. the MAX1667 responds to the following alarms: over_charged_alarm (d15), terminate_charge_alarm (d14), and over_temp_ alarm (d12). table 7 summarizes the alarmwarning() command? function. the alarm_inhibited status bit remains set until battery_present = 0 (battery removed), a chargermode() command is written with the por_reset bit set, or a new chargingvoltage() or chargingcurrent() is written. 7? n/a 0 5 4 n/a battery_present_mask 11?5 (msb) n/a not implemented. write 1 into this bit. 1 10 hot_stop not implemented. write 1 into this bit. 0 = interrupt on either edge of the battery_present status bit. 1 = do not interrupt because of a battery_present bit change. not implemented. write 1 into this bit. 0 = the thermistor_hot status bit does not turn the charger off. 1 = thermistor_hot turns the charger off. 0 = no change in any non-chargermode() settings. 1 = change the voltage and current settings to 0xffff and 0x0007 respectively; clear the thermistor_hot and alarm_inhibited bits. not implemented. write 0 into this bit. 0 = allow normal operation; clear the chg_inhibited status bit. 1 = turn the charger off; set the chg_inhibited status bit. not implemented. write 0 into this bit. function 2 por_reset 1 0 0 (lsb) inhibit_charge enable_polling 3 reset_to_zero por value** bit position* bit name table 3. chargermode() bit functions 1 6 power_fail_mask 0 = interrupt on either edge of the power_fail status bit. 1 = do not interrupt because of a power_fail bit change. * bit position in the d15?0 data. ** power-on reset value. n/a = not applicable
MAX1667 chemistry-independent, level 2 smart battery charger ______________________________________________________________________________________ 19 chargerstatus() the chargerstatus() command uses read-word proto- col (figure 8b). the command code for chargerstatus() is 0x13 (0b00010011). the chargerstatus() command returns information about thermistor impedance and the MAX1667? internal state. the read-word protocol returns d15?0. table 8 describes the meaning of the individual bits. the latched bits, thermistor_hot and alarm_inhibited, are cleared whenever bat- tery_present = 0 or chargermode() is written with por_reset = 1. interrupts and the alert-response address an interrupt is triggered ( int goes low) whenever power is applied to dcin, the battery_present bit changes, or the power_fail bit changes. battery_present and power_fail have interrupt masks that can be set or cleared via the chargermode() command. int stays low until the interrupt is cleared. there are two methods for clearing the interrupt: issuing a chargerstatus() com- mand, and using a modified receive byte protocol with a 0x19 (0b0011001) alert-response address. the MAX1667 responds to the alert-response address with its address (0x13) left justified as the most significant bits of the returned byte. __________applications information negative input voltage protection in most portable equipment, the dc power to charge batteries enters through a two-conductor cylindrical power jack. it is easy for the end user to add an adapter to switch the dc power? polarity. polarized capacitor c6 would be destroyed if a negative voltage were applied. diode d4 in figure 7 prevents this from happening. figure 8. smbus a) write-word and b) read-word protocols 0 msb lsb 1b 7 bits w slave address s 1b ack s msb lsb 1b 8 bits ack command byte 1b ack 1 msb lsb 1b 7 bits r slave address msb lsb 1b 8 bits ack low data byte p msb lsb 1b 8 bits nack high data byte preset to 0b0001001 d7 d0 d15 d8 chargermode() = 0x12 chargingcurrent() = 0x14 chargervoltage() = 0x15 alarmwarning() = 0x16 preset to 0b0001001 preset to 0b0001001 d7 d0 d15 d8 chargerstatus() = 0x13 1b ack msb lsb 1b 8 bits ack command byte 0 msb lsb 1b 7 bits w slave address s msb lsb 1b 8 bits ack low data byte p msb lsb 1b 8 bits ack high data byte a) write-word format b) read-word format legend: s = start condition or repeated start condition p = stop condition ack = acknowledge (logic low) nack = not acknowledge (logic high) w = write bit (logic low) r = read bit (logic high) master to slave slave to master
MAX1667 chemistry-independent, level 2 smart battery charger 20 ______________________________________________________________________________________ figure 9. chargingvoltage() data to voltage mapping 18.416v 16.368v v ref = 4.096v dcin > 20v 0v 0b000000000000xxxx 0x000x 0x20dx 0x47fx 0b001000001101xxxx 0b010010100000xxxx 0x313x 0b001100010011xxxx 0xfffx 0b111111111111xxxx 0x106x 0b000100000110xxxx 4.192v 12.592v chargingvoltage() d15 d0 data voltage set point (v0) 8.400v 5 35 115 160 sel = vl sel = open sel = gnd 0x0080 0b00001 (128) (896) 0b00111 0b10111 0b11111 (2944) (3968) (65535) a: b: c: 0x0380 0x0b80 0x0f80 0xffff a: chargingcurrent( ) code (d15 d0) b: equivalent decimal code c: current dac code (da4 da0) average cs-batt voltage in current regulation (mv) figure 10. average voltage between cs and batt vs. code figure 11. typical thermistor characteristics 1000 100 10 resistance (k ? ) 1 0.1 -40 -50 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 temperature ( c)
MAX1667 chemistry-independent, level 2 smart battery charger ______________________________________________________________________________________ 21 if reverse-polarity protection for the dc input power is not necessary, diode d4 can be omitted. this eliminates the power lost due to the voltage drop on diode d4. thermistor characterization figure 11 represents the expected electrical behavior of a 103etb-type thermistor (nominally 10k ? at +25? ?% or better) to be used with the MAX1667. the graph is typical of the suggested thermistor? charac- teristics. thermistor_or bit is set only when the thermistor value is > 100k ? . this indicates that the thermistor is open. thermistor_cold bit is set only when the thermistor value is > 30k ? . the thermistor indicates a cold bat- tery. thermistor_hot bit is set only when the thermistor value is < 3k ? . thermistor_ur bit is set only when the thermistor value is < 500 ? . multiple bits may be set depending on the values of the thermistor (e.g., a 450 ? thermistor will cause both the thermistor_hot and the thermistor_ur bits to be set). the thermistor may be replaced by fixed-value resistors in battery packs that do not require the ther- mistor as a secondary fail-safe indicator. in this case, it is the responsibility of the battery pack to manipulate the resistance to obtain correct charger behavior. table 4. chargingcurrent() bit functions 2048 da4 1024 da3 512 da2 256 da1 128 da0 d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 weight in ma (r sense = 40m ? ) function bit position 3968* fs* iout** 7** x 0x0010?xffff 0x0010?xffff 0x0010?xffff 0x0010?xffff 0x0000?x000f chargingvoltage() 0x0000 0x0001?x0007 0x0001?x0007 0x0008?x007f 0x0001?x0007 0 0 0 x chargingcurrent() x 1 0 0 1 x ccv_low x 0 x x 1 x voltage_ notreg 0 0 7 7 7 0 0 0 0 0 0 0 i out output current (ma) 0x0010?xffff 0 0 0 0 0 0 x x0x0010?xffff x x 0x0010?xffff 0x0008?x007f x 0x0080?xffff x x 0 0 0 0x0008?x007f 1 x x x x 1 1 x x x x 0 7 0 0 0 0 0 0 0 1 0 0 0 0 0 0 x x 1 x 1 0 0 0 0 alarm_ inhibited (note 1) charge_ inhibited table 5. relationship between iout source current and chargingcurrent() value * when sel = vl, values above 0x0f80 set the output current to 3.968a. when sel = open, values above 0x0b80 set the output current to 2.944a. when sel = gnd, values above 0x0380 set the output current to 0.896a. ** values below 0x0080 set the output current to 7ma. note 1: thermistor_hot and hot_stop and not (thermistor_ur).
MAX1667 chemistry-independent, level 2 smart battery charger 22 ______________________________________________________________________________________ 0x000f?xffff 0x0000?x007f 0x0000?x000f chargingvoltage() 0 no 0 0 0 x chargingcurrent() 0x000f?xffff 0x0100?x037f 0x000f?xffff 2? yes n/a sel = gnd current dac code 0 0 0 0x0080?x00ff no sel = gnd sw reg on? 1 yes 0 0 0 0x000f?xffff 0x0400?x047f 0x000f?xffff 7 yes 0 0 0 0x0380?x03ff 0x000f?xffff 0x0b80?x0bff 0x000f?xffff 7 yes 7 0 0 0 0x0480?x0b7f yes 7 yes 0 0 0 0 0 0 0x000f?xffff 0x0c80 0x000f?xffff 7 0 yes 0 0 0 0 0 0x0c00?x0c7f 0x000f?xffff 0x1000?xffff 0x000f?xffff 7 yes 7 0 0 0 0x0f80?x0fff yes 7 yes 0 0 0 x x x n/a no x 1 alarm_inhibited 0 (note 1) charge_inhibited x x n/a x no n/a no x x 1 1 0 0 0 0 0 table 6. relationship between current dac code and the chargingcurrent() value x x 1 x 1 x x x x 1 x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x alarmwarning() data bits set alarm_inhibited set alarm_inhibited set alarm_inhibited d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 result table 7. effect of the alarmwarning() command 0 0 0 sel = gnd current_or 0 1 1 0 1 1 1 1 1 n/a n/a n/a 0 2? n/a sel = open current dac code 1 8 23 7 9?2 23 23 23 23 n/a n/a n/a no yes no sel = open sw reg on? yes yes yes yes yes yes yes yes yes no no no 0 0 0 sel = open current_or 0 0 0 0 0 1 1 1 1 n/a n/a n/a 0 2? n/a sel = vl current dac code 1 8 23 7 9?2 25?0 31 24 31 n/a n/a n/a no yes no sel = vl sw reg on? yes yes yes yes yes yes yes yes yes no no no 0 0 0 sel = vl current_or 0 0 0 0 0 0 1 0 0 n/a n/a n/a note 1: thermistor_hot and hot_stop and not (thermistor_ur).
MAX1667 chemistry-independent, level 2 smart battery charger ______________________________________________________________________________________ 23 table 8. chargerstatus() bit descriptions description 0 = ready to charge a smart battery 1 = charger is off; iout current = 0ma; dlo = pgnd; dhi = lx 0 = vl voltage < 4v 1 = vl voltage > 4v always returns ? 0 = thm voltage > 5% of ref voltage 1 = thm voltage < 5% of ref voltage no 11 this bit reports the state of an internal sr flip-flop (denoted alarm_inhibited flip-flop). the alarm_inhibited flip-flop is set whenever the alarmwarning() command is written with d15, d14, or d12 set. the alarm_inhibited flip-flop is cleared whenever battery_present = 0, or chargermode() is written with por_reset = 1, or chargingvoltage() or chargingcurrent() is written. latched? yes no n/a bit position 0 15 1 ac_present 0 = no battery is present (thermistor_or = 1). 1 = a battery is present (thermistor_or = 0). yes no 14 12 battery_present 0 = batt voltage < 89% of dcin voltage 1 = batt voltage > 89% of dcin voltage alarm_inhibited no 13 thermistor_ur always returns 0 0 = chargingcurrent() value is valid for MAX1667. 1 = chargingcurrent() value exceeds what MAX1667 can actually deliver. 0 = chargingvoltage() value is valid for MAX1667. 1 = chargingvoltage() value exceeds what MAX1667 can actually deliver. n/a no no 5 6 7 0 = thm voltage < 91% of ref voltage 1 = thm voltage > 91% of ref voltage 0 = thm voltage < 75% of ref voltage 1 = thm voltage > 75% of ref voltage this bit reports the state of an internal sr flip-flop (denoted thermistor_hot flip-flop). the thermistor_hot flip-flop is set whenever thm is below 23% of ref. it is cleared whenever battery_present = 0 or chargermode() is written with por_reset = 1. no no yes 8 9 10 thermistor_or thermistor_cold thermistor_hot level_3 current_or voltage_or power_fail 0 = batt voltage is limited at the voltage set point (batt = v0). 1 = batt voltage is less than the voltage set point (batt < v0). always returns 1 0 = current through r1 is at its limit (i batt = i0). 1 = current through r1 is less than its limit (i batt < i0). no n/a no 2 4 3 voltage_notreg level_2 name charge_inhibited current_notreg master_mode * bit position in the d15?0 data n/a = not applicable
pc board layout considerations good pc board layout is required to achieve specified noise, efficiency, and stable performance. the pc board layout artist must be given explicit instructions, preferably a pencil sketch showing the placement of power-switching components and high-current routing. refer to the pc board layout in the MAX1667 evaluation kit manual for examples. a ground plane is essential for optimum performance. in most applications, the circuit will be located on a multilayer board, and full use of the four or more copper layers is recommended. use the top layer for high-current connections, the bottom layer for quiet connections (ref, ccv, cci, dacv, gnd), and the inner layers for an uninterrupted ground plane. use the following step-by-step guide: 1) place the high-power components (c1, c6, m1, m2, d1, l1, and r1) first, with their grounds adjacent: minimize current-sense resistor trace lengths and ensure accurate current sensing with kelvin con- nections (figure 12). minimize ground trace lengths in the high-current paths. minimize other trace lengths in the high-current paths: use > 5mm-wide traces. connect cin to high-side mosfet drain: 10mm max length. connect rectifier diode cathode to low side. mosfet: 5mm max length. lx node (mosfets, rectifier cathode, induc- tor): 15mm max length. ideally, surface-mount power components are butted up to one another with their ground terminals almost touching. these high-current grounds are then con- nected to each other with a wide, filled zone of top-layer copper so they do not go through vias. the resulting top-layer subground plane is connected to the normal inner-layer ground plane at the output ground terminals, which ensures that the ic? analog ground is sensing at the supply? output terminals without interfer- ence from ir drops and ground noise. other high-cur- rent paths should also be minimized, but focusing primarily on short ground and current-sense connec- tions eliminates about 90% of all pc board layout prob- lems. 2) place the ic and signal components. keep the main switching nodes (lx nodes) away from sensitive analog components (current-sense traces and ref capacitor). place the ic and analog components on the opposite side of the board from the power- switching node. important : the ic must be no fur- ther than 10mm from the current-sense resistors. keep the gate-drive traces (dh, dl, and bst) short- er than 20mm and route them away from csh, csl, and ref. place ceramic bypass capacitors close to the ic. the bulk capacitors can be placed further away. 3) use a single-point star ground where the input ground trace, power ground (subground plane), and normal ground plane meet at the supply? output ground terminal. connect both ic ground pins and all ic bypass capacitors to the normal ground plane. upgrading from max1647 to MAX1667 the MAX1667 is a pin- and software-compatible upgrade to the max1647, with the following functional differences: 1) the pwm duty cycle has been extended to 97%. 2) the internal reference has been changed to +4.096v with 1% accuracy over line, load, and tem- perature. 3) the internal voltage dac has been changed to allow a program voltage of 18,416mv. up to four li+ cells can be charged. 4) the linear current source (iout) has been reduced to 7ma and turns off when the switching regulator is on. 5) an internal diode has been added to the iout pin to prevent reverse current from batt when the dc source is removed. 6) the internal current dac was changed from 6-bit to 5-bit resolution. MAX1667 chemistry-independent, level 2 smart battery charger 24 ______________________________________________________________________________________ figure 12. kelvin connections for the current-sense resistors MAX1667 sense resistor high-current path
MAX1667 chemistry-independent, level 2 smart battery charger ______________________________________________________________________________________ 25 7) the sel pin digitally limits the output current to 4a, 3a, or 1a without a change in sense resistor value between the three modes. 8) the single count current-sense voltage has been changed to 5mv. r1 required is now 40m ? . 9) after the alarmwarning() message, the charger is not locked off. subsequent chargingvoltage() or chargingcurrent() commands allow the MAX1667 to resume the charge. 10) the alert-response address is 0x13 (0b00010011). when upgrading a max1647 design, follow these rec- ommended or required changes (part numbers refer to figure 3 of the max1647 data sheet): 1) change r1 to 40m ? (required). 2) remove diodes d5 and d6, transistor q1, and resis- tor r6. connect iout directly to batt (recommend- ed). 3) remove the external +4.096v reference (recom- mended). 4) remove d6 (recommended). when doing this, also place a small-signal diode in series with r7 and con- nect it directly to the dc source (see d3 and r5 on figure 3 of the max1647 data sheet). 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 bst lx dhi dlo ccv vl dcin iout top view pgnd dacv sda scl batt cs sel cci 12 11 9 10 thm int agnd ref MAX1667 ssop pin configuration transistor count: 6378 substrate connected to agnd chip information
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 26 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 2003 maxim integrated products printed usa is a registered trademark of maxim integrated products. MAX1667 chemistry-independent, level 2 smart battery charger ssop.eps package outline, ssop, 5.3 mm 1 1 21-0056 c rev. document control no. approval proprietary information title: notes: 1. d&e do not include mold flash. 2. mold flash or protrusions not to exceed .15 mm (.006"). 3. controlling dimension: millimeters. 4. meets jedec mo150. 5. leads to be coplanar within 0.10 mm. 7.90 h l 0 0.301 0.025 8 0.311 0.037 0 7.65 0.63 8 0.95 max 5.38 millimeters b c d e e a1 dim a see variations 0.0256 bsc 0.010 0.004 0.205 0.002 0.015 0.008 0.212 0.008 inches min max 0.078 0.65 bsc 0.25 0.09 5.20 0.05 0.38 0.20 0.21 min 1.73 1.99 millimeters 6.07 6.07 10.07 8.07 7.07 inches d d d d d 0.239 0.239 0.397 0.317 0.278 min 0.249 0.249 0.407 0.328 0.289 max min 6.33 6.33 10.33 8.33 7.33 14l 16l 28l 24l 20l max n a d e a1 l c h e n 12 b 0.068 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .)

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